1. Field of the Invention
The present invention relates generally to the field of digital electronic systems in integrated circuit form, called “systems on a chip” or SoC.
2. Description of the Related Art
More specifically, the invention relates to the management of access to indexed registers associated with arbitration mechanisms provided for managing conflicting access requests initiated by different functional modules in such a system.
In a system on a chip, resources are conventionally shared between the functional modules that have access to them. Such a functional module is sometimes called a virtual component or an “intellectual property” block, or even IP block in professional jargon. It is designed to handle a defined function, or is for general-purpose use (it may be a microprocessor or a microcontroller). It can be implemented in the form of hardware and/or software elements.
A distinction is drawn between master type modules (hereinafter called initiator modules), which take the initiative to exchange data with one or more other modules, and slave type modules (hereinafter called target modules), the role of which is to respond to the requests received from the initiator module which has control. If there is a plurality of initiator modules, an arbitration unit (or arbiter) is required to arbitrate between conflicting requests to access a common resource originating from different initiator modules, to grant an exclusive right of access to the resource to a specific one of said initiator modules.
Conventionally, at least one target module includes data registers, which can be accessed by initiator modules via a defined address, and of which at least some are indexed registers. The set of registers addressable in this way forms the system's memory plane. An indexed register is a multiple data storage space, but addressable by a unique address, combined with an indexing mechanism using a linked index register. Note that the index register is normally common to all the indexed registers of a particular functional module. A register indexing mechanism is comparable to a memory paging mechanism.
To allow the indexed registers to be used by the initiator modules, the associated index register is accessible in write mode via an ad hoc write request. This write request is used to store in the index register an index value for the indexed registers. It can originate from the initiator module which needs to access one of the indexed registers, and then precedes a request or a series of requests to access this indexed register produced by that initiator module.
Currently, for any type of data register (i.e., conventional register or indexed register), access requests are undifferentiated, inasmuch as there is nothing to distinguish a request relating to a conventional register from a request relating to an indexed register.
In certain applications, this can lead to a software overload in the code of the application to be executed, and therefore to performance losses at system level.
In addition, if an initiator module sends a series of successive access requests for a particular indexed register, and if the target module at the same time is the object of a conflicting access request originating from another initiator module, there is then a major risk that the arbitration unit will order a change of priority in favor of said other initiator module. Such is particularly the case if the arbitration unit implements an arbitration mechanism with a round-robin algorithm, which assigns the right of access sequentially to the requesting initiator modules (i.e., each in turn), or a seniority-based, “least recently used” (LRU) algorithm, which grants the right of access to the initiator module that requests it and which had access least recently. Said other initiator module can then write to the index register another index value to access another indexed register. When the arbitration unit returns control to the initial initiator module, this module believes that it will continue to access the initial indexed register, although it will in reality finish executing its series of requests by accessing said other indexed register, in other words, the indexed register which the other initiator module has just accessed.
The code of the application will not therefore be executed correctly. The result is that the application will be corrupted.